How Cerebras spreads a trillion-parameter model across 59 wafers

Cerebras published a technical walkthrough of how it serves very large models on its wafer-scale hardware, using the roughly 3-trillion-parameter Kimi K3 as a worked example. The idea is to treat the chips like an assembly line. Each WSE-3T wafer holds 44 GB of on-chip memory, so the model is cut into layers and spread across many wafers that each own a fixed slice of the network. At 4-bit weight quantization, each of Kimi K3's 93 layers needs about 16 GB, which means most layers fit on a single wafer with room left over for their state.

The split is not uniform. Each dense attention layer gets its own wafer, with the spare memory reserved for its KV cache, while the lighter linear-attention layers are packed two to a wafer because they need only a small fixed state per request. That works out to 35 wafers for the 69 linear layers plus 24 for the dense ones, so 59 wafers in total. The post, written by Sarah Chieng, stresses that weights never move once loaded. Only activations travel between wafers, over RDMA on Ethernet at roughly 2 microseconds per hop, so different requests can occupy different stages at the same time. Cerebras says these setups run multi-trillion-parameter models at about 1,000 to 2,000 tokens per second, and it argues the honest way to compare systems is tokens per second per megawatt at a fixed output speed, not raw batch size or concurrency.

Why it matters

If you are choosing where to run large-model inference, this is a concrete look at a design that trades GPU-style weight shuffling for a fixed pipeline, and the per-watt framing is the number to hold vendors to when you compare quotes, since headline throughput can hide how much power it costs to get there.